Product description
The 1ED020I12-F2 is a single-channel galvanically isolated IGBT gate driver using coreless transformer technology for signal transfer across the isolation barrier. The input side is 5V CMOS compatible and can be directly connected to a microcontroller or DSP. The output side supports both bipolar and unipolar supply configurations. Protection features include IGBT desaturation detection (Vcesat monitoring) with programmable blanking time via external capacitor, active Miller clamp to prevent parasitic turn-on, short circuit clamping on OUT and CLAMP pins, undervoltage lockout on both input and output sides, a watchdog timer monitoring internal signal transmission, and active shut-down holding the gate at VEE2 when the output supply is absent. Two open-drain status outputs report device readiness (RDY) and desaturation faults (FLT, active low). IN+ has an internal pull-down and IN- has an internal pull-up, both ensuring IGBT off-state when inputs are floating.
- Output peak current: 2A source / 2A sink (rail-to-rail, MOSFET output stage)
- Input supply (VCC1): 4.5 to 5.5V, recommended 5V
- Output supply (VCC2): 13 to 20V, recommended 15V
- Negative output supply (VEE2): 0 to -12V, recommended -8V, VEE2 pins must be tied to GND2 if no negative supply is used
- Max output supply span (VCC2 to VEE2): 28V
- Isolation voltage: 1200V peak
- Common mode transient immunity: 50 kV/µs at 500V
- UVLO input chip: turn-on 4.1V typ, turn-off 3.8V typ
- UVLO output chip: turn-on 12.0V typ, turn-off 11.0V typ
- Propagation delay ON/OFF: 170 ns / 165 ns typ (100 pF load)
- Rise time / fall time: 30 ns / 50 ns typ (1 nF load)
- Desaturation threshold: 9V typ
- Active Miller clamp threshold: 2.1V typ below VEE2, clamp current up to 2A
- Logic input thresholds: low max 1.5V, high min 3.5V
- IN+ internal pull-down, IN- and RST internal pull-up
- Package: PG-DSO-16-15 (wide-body SOIC-16)
- Operating temperature: -40°C to +105°C